(1) Field of the Invention
The present invention relates generally to circuitry for driving an liquid crystal display (LCD) or the like, and more particularly, to a circuit and a method which largely reduce the consumed power for driving the data lines of the LCD display.
(2) Description of the Related Art
The breathtaking growth of the information and communication industries push forward the fast development of LCD displays, which are used in a large variety of products including notebook computers, hand-held computers, cellular phones, and many kinds of personal digital assistants (PDAs). The LCD displays are available in both gray-scale and color panels, and are typically arranged as a matrix of intersecting hundreds or thousands of rows and columns. Generally, the intersection of each row and column forms a pixel, whose brightness and color are defined by the electronic voltage applied thereto.
The LCD monitors used in the notebook computers requires a relatively large number of such pixels to form a pixel array. Referring now to FIG. 1, a portion of a pixel array of an active matrix liquid crystal display according to the prior art is shown. The four pixels connected in the fifth row 5, the sixth row 6, the second column 2, and the third column 3 of the array are shown. Each pixel is comprised of a switch 7 and a capacitor 8. The switch of each pixel in the same row is connected by a scan line, and the switch of each pixel in the same column is connected by a data line, The method of controlling the image displayed on the screen is to select one scan line at a time, and to apply control voltages through each data line to each column of the selected scan line. After all columns of the selected scan line are applied the control voltages, the next scan line will be selected to apply control voltages through each data line to its corresponding column. After the completion of one display cycle during which each row in the array has been selected, a new display cycle begins, and the process is repeated to refresh the displayed image.
The data lines are driven by a data driver, which is typically formed upon monolithic integrated circuits. Actually, a color LCD monitor requires three times as many data driver outputs as the monochrome LCD monitor. The color LCD monitor requires three data driver outputs per pixel , one of each of the three primary colors (red, green, blue) to be displayed. Thus, a typical VGA color liquid crystal display with 480 rowsxc3x97640 columns includes 1920 data lines which must be driven by a like number of column data driver outputs.
The liquid crystal displays are capable of displaying images because the optical transmission characteristics of liquid crystal material change in accordance with the magnitude of the applied electronic voltage. However, the application of a steady DC voltage to a liquid crystal material for a long; period will permanently change and degrade its physical properties. For this reason, it is common to drive the liquid crystal displays using drive techniques which charge each liquid crystal with voltages of alternating polarities relative to a common midpoint voltage value. The voltages greater than and less than the common midpoint voltage represent the positive polarity and the negative polarity, respectively.
Image quality displayed by the LCDs and the complexity of the driver circuitry are highly related to the methods of polarity inversion. There are four major types of inversion of alternating polarities relative to the common midpoint voltage, i.e. frame inversion, column inversion, row inversion, and dot inversion. According to the frame inversion, every pixel on the display frame is first driven to its positive polarity during a first display cycle, and then driven to its negative polarity during the second display cycle. The column inversion implies that each pixel in a data line is driven to the positive polarity, and the adjacent data line is driven to the negative polarity. According to the row inversion, if the pixels in a row are driven to the positive polarity during the first row drive period, the pixels in the next row will be driven to the negative polarity during the second row drive period. According to the dot inversion, if a pixel is charged with the positive polarity, the next pixel within the same row will be charged to the negative polarity, and the adjacent pixel in the same column but in the preceding or following row is also charged to the negative polarity. Although the drive circuitry of the dot inversion is the most complex one, it displays the best image property. For this reason, the dot inversion will be the main stream of the drive circuitry in the field of the liquid crystal displays.
The data driver suffers a relatively large capacity from the data line. In accordance with conventional teachings, power dissipation of a circuit is directly related to the operating frequency (f), the capacitance (C) and the square of the voltage (V2) applied to the capacitive element. For this reason, the power dissipation of a data driver is significant. Especially, in the inversion schemes of the row inversion and the dot inversion, the charging/discharging processes for alternating polarities results in a very large power dissipation.
For this reason, it is very important for LCD industries to develop a low-power LCD data driver.
Accordingly, it is a primary object of the present invention to provide a low-power LCD data driver.
It is another object of the present invention to provide a method of driving LCD""s data lines with low power dissipation.
A power-saving data driver for stepwisely applying alternating driving voltages with a predetermined number of steps to a plurality of data lines in a liquid crystal display is disclosed. The data driver is comprised of a clocking means, a plurality of reference voltages, and a plurality of analog voltage driver. The clocking means is used for providing clock signals for stepwisely charging and discharging. The plurality of reference voltages work as steps.of the stepwisely charging and discharging. The reference voltages are distributed between the system voltage and the ground. Each of the analog voltage driver corresponds to one of the data lines. A given pixel is stepwisely driven from the driving voltage of the last pixel as a beginning voltage to the driving voltage of the given pixel as a target voltage. The reference voltages between the beginning voltage and the target voltage are turned-on in order according to the clock signals generated by the clocking means.
In one embodiment of the present invention, the predetermined number of steps is four and thus there are three reference voltages, i.e. the first reference voltage, the second reference voltage, and the third reference voltage. The second reference voltage is the common midpoint voltage of the alternating driving voltages. The first reference voltage is 75% of the system voltage and the third reference voltage is 25% of the system voltage.
In another embodiment of the present invention, the first reference voltage is a voltage corresponding to the positive polarity with 50% of optical transmission rate, and the third reference voltage is a voltage corresponding to the negative polarity with 50% of optical transmission rate.
In another embodiment of the present invention, the first reference voltage is the positive voltage obtained by charging/discharging a capacitor connected to the analog voltage driver for a plurality of times, and the third reference voltage is a negative voltage obtained by charging/discharging a capacitor connected to the analog voltage driver for a plurality of times.